 | | PowerWise LPV521 Extends Battery Life by Consuming Less than 560 Nanowatts |
| The SPRINT consortium announced today the publication of the Multi-Core Debug (MCD) API v1.0. The release is a result of the consortium’s debug and analysis working group targeting the development of new debug and analysis interfaces. Its members contributed their expertise and knowledge in the field of application software debugging for System-on-Chip (SoC) designs. The API addresses debugging of multi-core platforms as both real hardware and software simulation. Adopting the interface on both tool- and target-side, debug and analysis solutions can be easily attached to the latest available SoC prototype, no matter if it is a virtual prototype (software simulation) or silicon. It has the potential to reduce expenses for tools and to increase the efficiency of software engineers with respect to application debugging and analysis throughout the entire process of the SoC design. Today, SoC design flows span several levels of abstraction, ranging from high level simulations to the final integrated hardware. Throughout this design, various off-the-shelf components of intellectual property (IP) are assembled in order to achieve high quality designs in short time. The Open SoC Design Platform for Reuse and Integration of IPs (SPRINT) Project has taken the challenge to develop a standards-based platform supporting the creation of interoperable and reusable IP as well as their efficient integration into high class SoCs. The SPRINT consortium consists of numerous companies and research facilities from the IP business, including both providers and users. |
| 6WIND’s 6WINDGate(tm) Software Suite Delivers Reduction in Design Time Leading to Design Cost Savings and Faster Time to Market for Engineers Using/on OCTEON II Processors |
| DATE 09 continues to expand its unique feature of linking new research findings to applications and of stimulating vivid exchange of information among all players in the electronics industry. |
| Simplifies multicore communications management and scalability |
| Wind River announced that working in conjunction with Intel the two companies will collaborate to market optimized multicore solutions. |
| The T6M-100 offers the highest performance AdvancedMC™ board with 64 general-purpose cores and two 10 Gbps Ethernet interfaces. The T6M-100 is designed to meet the growing demand for converged, content-aware IP networks that accommodate data, voice and video. |
|  |