 | | Clock-domain crossing verification software for ASIC and FPGA designs |
| Signal averaging and FIR filtering are optional FPGA images installed on select Gage digitizers |
| A series of color space converters that are virtual component solutions for leading-edge image compression and decompression applications |
| The CHAMP-AV5, P.A. semi-1682 power architecture-based DSP VME compute engine |
| Two radiation-tolerant 3U, CompactPCI I/O cards that increase real-time communication and I/O functions between control subsystems and external subsystems |
| Generates reactive VHDL, Verilog, and SystemC test benches and bus-functional models from language-independent timing diagrams |
| Connectorless probe and B4655A FPGA Dynamic Probe support specific needs |
| High-performance low-power System-on-a-Module (SoM) designed for advanced embedded applications |
| Ultra High-Speed Acquisition Board |
| Integrates ultra-fast signal capture, generation, and co-processing on an advanced PMC architecture |
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