 | | A 32/64-bit VLIW RISC core designed to integrate with 32-bit or 64-bit multimedia and DSP coprocessors |
| A single-chip RISC microprocessor |
| PICMG 1.0 Pentium M Socket 479 533 MHz FSB CPU card with VGA, PCI Express GbE, USB 2.0, SATA, and SATA II |
| A general purpose, fixed-point DSP based on TI's advanced VelociTI very-long-instruction-word (VLIW) architecture |
| DSP function accelerators, supporting TI, Analog Devices, Motorola, Lucent, ARM, and MIPS microprocessors |
| A fixed-point, 16-bit DSP |
| An Internet Gateway Processor DSP chip with an architecture capable of performing multiple operations in parallel |
| Scalable QR decompositon core for Xilinix Virtex and Virtex-II family FPGAs |
| A family of six single-chip microcomputers optimized for digital signal processing applications |
| A DSP core based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle |
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