 | | Digital Pulse Processing for the Pulse Height Analysis (formerly DPP-TF) |
| The Mod. V1742 is a VME board housing two sections of 16+1Channels 12bit 5GS/s Switched Capacitor Digitizer, with 1 Vpp input dynamic range on single ended MCX coaxial connectors.
The DC offset adjustment (range ± 1V) on each channel by 16bit DAC allows a right sampling of a bipolar (Vin=± 0.5V) up to a full positive (Vin= 0 ÷ +1V) or negative (Vin= 0 ÷ -1V) analog input swing without losing dynamic resolution.The analog input signals are continuously sampled into the DRS4s (resolution up to 200ps) in a circular analog memory buffer (1024 cells). As a trigger signal arrives, all analog memory buffers are frozen and subsequently digitized with a resolution of 12bit into a digital memory buffer. The digital memory (128 events deep for each channel, where 1 event = 1024x12bit) allows to store following events, even if the readout is not yet started.
Moreover, since the digital memory buffers work like FIFOs, the readout activity from VME or Optical Link doesn?t affect write operations of successive events.A common board trigger can be provided via VME or Optical Link, or by TRGIN input. |
| The 720 and 751 digitizers running DPP-PSD firmware can perform as multichannel data acquisition systems for nuclear physics or other applications requiring neutron radiation detection.
The digitizers accept signals directly from the detector and implement a digital replacement of dual gate QDC, discriminator and gate generator.The digitizer runs on real time:Self Trigger using CR-RC digital Time filter algorithm
Input signal baseline (pedestal) calculation
Dual gate generation with programmable parameters
Double integration of the prompt and delayed charge for Pulse Shape Discrimination
Pedestal subtraction for energy calculationSome typical applications:Readout of PMTs coupled to organic liquid scintillators (e.g. BC501-A)
Applications that require a moderate timing resolution to perform coincidences
Gamma-Neutron discrimination (dual gate integration) |
| 32-Channel Latching Scaler |
| 4/8 channel, 8-bit 1,000/500 MSps digitizer |
| Eight-channel 12-bit 250 MSps digitizer |
| VME(64/64X) 21-slot 8U (6+2) Powered Crate Series |
| Eight-channel, 8-bit 500 MSps digitizer |
| General-purpose VME FPGA-based board |
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