Expansion of CoWare Model Library Enables Development of Optimal Architectures for MIPS32 34K-based Systems. Integration of the new processor model into CoWare’s ConvergenSC SystemC-based environment for platform-driven ESL design enables users and prospective users of the MIPS32 34K cores to assess and optimize their capabilities on system performance, at an early stage of design. Designers can readily combine the MIPS32 34K model with other elements of the CoWare Model Library, such as AMBA or OCP-IP-compliant on-chip interconnects, and peripheral models, to create a SystemC transaction-level model of the complete platform, months ahead of the availability of a hardware prototype. Designers can also run real software on the platform model and simulate at speeds fast enough to analyze overall system performance and assess the impact of the 34K cores’ innovative capabilities such as Multi-threading (MT) and DSP functions.

CoWare (R) Inc., the leading supplier of system-level electronic design automation (EDA) software and services announced the availability of the High Speed Downlink Packet Access (HSDPA) models in 3GPP Library for its SPW signal processing design solution. Wireless system designers are able to reduce their specification risk by up to 70%.